Intel, Duisburg

June 2019 - Nov. 2019:

Master Thesis Student

Thesis topic: ​ Neural Networks based Digital Predistortion.
Implemented a novel two hidden layer (2HL) real-valued focus time-delay neural network (RVFTDNN) based DPD architecture with PA output power target.
(Baseband Digital Predistortion (DPD), DPD architectures, Linearization techniques, Neural networks, Power Amplifier (PA) Characteristics )

Nov. 2018 - May 2019:

Logic Design and Verification Intern

Created Matlab-SPICE co-simulation toolbox which allows full access to mixed-level/mixed-signal circuit simulation on Matlab (MEX, C/C++) Created Supply Voltage-dependent PA models with Memory effects. (Volterra series, Nonlinear System Identification )

CRISP (Center for Research in Security and Privacy) Lab, Darmstadt

June 2017 - Sep. 2017:

Student Employee [part-time]

Design and integration of a BLAKE 2b Hash Controller interface and a hash simulator using Verilog for control flow attestation on the PULPino processor.
(Verilog, SystemVerilog, PULPino, toolchain)

Synopsys, Sri Lanka

Mar. 2014 - Sep. 2016:

Corporate Application Engineer

Validated static low power (LP) tools ‘VCLP’ and ‘Spyglass’ - System on Chip design verification tools.
Worked on LP projects and features related to LP Strategies, command and options. Analysing and validating customer designs.
Design development at RTL,Netlist and PG Netlist stages. Automated Benchmark processes and report generating.

GlassCUBE (undergrad startup), Sri Lanka

Jun. 2012 - Nov. 2012:

A founding member [part-time]

Front-end developer of following apps
DriveMODE - An app designed for drivers to easily accept or reject calls by simply saying “Yes” or “No”.
MoviesLK - Hub of Sri Lankan movie theatre information.
(Java, Android, HTML, CSS, Javascript, Photoshop, Illustrator, After Effects, Adobe Premiere Pro)

Technische Universität Darmstadt

Oct. 2016 - Dec. 2019

M.Sc. Information and Communication Engineering

University of Moratuwa - Sri Lanka

2009 - 2014

B.Sc. Electronic and Telecommunication Engineering

[1] S. Mallawaarachchi, K. Wimalana, A. Liyanage, G. Premalal, S. Samarasinghe, and N. D. Nanayakkara, “Automating whole slide imaging using an arduino platform,” in 8th international conference on Biomedical Engineering (BMEiCON), (Pattaya, Thailand), IEEE, Nov. 2015.

[2] S. Mallawaarachchi, G. Premalal, K. Wimalana, A. Liyanage, S. Samarasinghe, and N. D. Nanayakkara, “Detection of microfilariae in peripheral blood smears using image analysis,” in Industrial and Information Systems (ICIIS), 2013 8th IEEE International Conference on, (Peradeniya, Sri Lanka), pp. 300–303, IEEE, Dec. 2013.

Master Thesis: Neural Networks based Digital Predistortion

Dec. 2019

Implemented a novel two hidden layer (2HL) real-valued focus time-delay neural network (RVFTDNN) based DPD architecture with PA output power target. Adding the ‘PA output power target’ increased the complete range of PA characteristics. Compared to state-of-the-art, this method has removed the reloading of coefficients which need the data transferring between baseband-chip to RF-chip.

Supply Voltage-dependent PA models with Dynamic Nonlinearity

May 2019

Implemented a MatLab program that generates the supply voltage dependent PA model (Volterra Series based) for a given measured data set.

MatSpi: MATLAB Spice co-simulation toolbox

Feb. 2019

Created a mixed-level/mixed-signal circuit simulation toolbox for Matlab. With MatSpi; the user has full access to the two most powerful simulation tools in one single design environment. Users can use Matlab’s visualization capabilities and superior computational analysis power for analog circuit simulations and decision making which speedup the analog/mix-signal circuit design cycle.

Digital-to-Analog(DAC) Converter

July 2018

Designed the schematic and the layout of a 3-Bit Resistor-String DAC by using State-of-the-Art Commercial CAD Tools.

List scheduler for pipelined Functional Units

Jan. 2018

Implementation of a List scheduling algorithm that supports different priority criteria. (High-Level Synthesis, Scheduling Algorithms, Java)

Processor with Multiple pipeline stages

Aug. 2017

Implementation, Verification, Gate-Level synthesis and Simulation of a Pipelined Processor of ARM THUMB instruction set architecture that executes given binary instructions. (Verilog, Modelsim, Design Compiler)
RTL & testbench code available on my GitHub page: https://github.com/ashan8k/HDL_LAB

Final Year Project (University of Moratuwa): Automated Slide Scanning Microscope with Assistive Diagnostic Plug-ins

Feb. 2014

Successfully upgraded a conventional optical microscope into a state of the art Whole Slide Imaging (WSI) microscope capable of assisting many medical applications. Besides the hardware platform, fully functional software (QT/C++) was developed for microscope control and image analysis. The demonstrative plug-in can diagnose Lymphatic Filariasis by detecting Microfilariae in Peripheral Blood Smears. Please refer publications [1] and [2].

SoC Design using a 8051 Processor

June 2013

Implemented the core functionality of the 8051 processor using an FPGA.

Android ADK Project: Mini wireless robot navigation via Android Phone

Oct. 2013

Implemented a wireless connection between two android devices and a Arduino Mega ADK.

Computer-Aided Navigation on A UGV

Dec. 2012

Implemented a fully functional automated unmanned ground vehicle prototype that is navigated precisely via a computer.

Android Application Development Under university Startup

Aug. 2012

DriveMODE - An app designed for drivers to easily accept or reject calls by simply saying “Yes” or “No”.
MoviesLK - Hub of Sri Lankan movie theatre information.

Image Processing Toolkit on an FPGA

Mar. 2012

Designed basic image processing applications using an FPGA.

IESL All Island Robot Competition (Won the 2nd Runners-up)

Nov. 2011

Built an Omni wheel soccer playing wireless robot that can be navigated using image processing techniques.

Programming Project: Financial Management System

Aug. 2011

Designed a basic financial management system for the financial division of University of Moratuwa.

The Misplaced Item Finder

Oct. 2010

Created fully functional portable low cost device which helps to find multiple items bearing a key tag within 20m by emitting a sound.